This invention relates to multiplexors. More particularly, it is concerned with multiplexor circuits having internal decoding.
One function which has proven readily amenable to being incorporated into conventional bipolar transistor integrated circuits is that of multiplexing. In addition, in order to reduce the number of interconnections between individual units of an apparatus the function of decoding the select input information may also be incorporated into the multiplexor integrated circuit. One typical form of a multiplexor with decoding has four data input terminals which are selectively connected to an output terminal by binary signals applied to select input terminals. A circuit of this type employs three sets of transistor pairs arranged in series. Binary select input signals to the pair of transistors of the first two sets steer the current flow through one of four pairs of transistors of the third set to which the data input terminals are connected. It is desirable that multiplexor circuitry of this type operate at rapid switching speeds and have low voltage and consequently low power consumption requirements.